システムタスク $clog2 が使えます。2 を底とする対数の天井関数の結果が得られます。
$clog2 の結果 + 1 が必要な bit 幅です。使えるのは、Verilog 2005 からかな？
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| module m #(max_size = 1023) ( | |
| input clk, | |
| input rst_n, | |
| input [$clog2(max_count):0] in, | |
| output [$clog2(max_count):0] out | |
| ); | |
| endmodule |
See Also
- IEEE Std 1364™-2005: 17.11.1 Integer math functions
- IEEE Std 1800™-2012: 20.8.1 Integer math functions